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1/15 www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. large current external fet controller type switching regulators step-up/down, high-efficiency switching regulators (controller type) BD8303MUV general description rohm?s highly-efficient step-up/down switching regulator bd 8303muv generates step-up/down output including 3.3 v / 5 v from 1 cell of lithium battery, 4 batteries, or 2 cells of li batteries with just one inductor. this ic adopts an original step-up/down drive system and creates a higher efficient power supply than conventional sepic-system or h-bridge sy stem switching regulators. features 1)highly-efficient step-up/down dc/dc converter to be constructed just with one inductor. 2) supports a wide range of power supply voltage range (input voltage: 2.7 v - 14.0 v) 3) supports high-current application with external nch fet. 4) incorporates soft-start function. 5) incorporates timer latch system short protecting function. 6) high heat radiation surface mounted package qfn16 pin, 3 mm 3 mm application general portable equipment like dvc, single-lens reflex cameras, portable dvds, or mobile pcs absolute ma ximum ratings when installed on a 70.0 mm 70.0 mm 1.6 mm glass epoxy board. the rating is reduced by 4.96 mw/c at ta = 25c or mor e. operating conditions (ta = 25c) parameter symbol standard value unit min typ max power supply voltage vcc 2.7 14 v output voltage vout 1.8 12 v oscillation frequency fosc 0.2 0.6 1.0 mhz * these specifications are subject to change wit hout advance notice for modifications and other reasons. parameter symbol rating unit maximum applied power voltage vcc 15 v vreg 7 v between boot 1, 2 and sw 1, 2 7 v between boot 1, 2 and gnd 20 v sw1, 2 15 v power dissipation pd 620 mw operating temperat ure range topr 25 to +85 c storage temperature range tstg 55 to +150 c junction temperature tjmax +150 c no.09028eat02
technical note 2/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. electrical characteristics (unless otherwise specified, ta = 25 c, vcc = 7.4 v) parameter symbol target value unit conditions minimum typical maximum [low voltage input malfunction preventing circuit] detection threshold voltage v uv - 2.4 2.6 v vreg monitor hysteresis range v uv hy 50 100 200 mv [oscillator] oscillation frequency fosc 480 600 720 khz r t =51k ? [regulator] output voltage vreg 4.7 5.1 5.5 v [error amp] inv threshold voltage vinv 0.9875 1.00 1.0125 v input bias current iinv -50 0 50 na vcc=12.0v , i inv =6.0v soft-start time tss 2.4 4.0 5.6 msec r t =51k ? output source current i eo 10 20 30 a v inv =0.8v , v fb =1.5v output sink current i ei 0.6 1.3 3 ma v inv =1.2v , v fb =1.5v [pwm comparator] sw1 max duty dmax1 85 90 95 % hg1 on sw2 max duty dmax2 85 90 95 % lg2 on sw2 min duty dmin2 5 10 15 % lg2 off [output] hg1, 2 high side on resistance r on hp - 4 8 ? hg1, 2 low side on resistance r on hn - 4 8 ? lg1, 2 high side on resistance r on lp - 4 8 ? lg1, 2 low side on resistance r on ln - 4 8 ? hg1-lg1 dead time tdead1 50 100 200 nsec hg2-lg2 dead time tdead2 50 100 200 nsec [stb] stb pin control voltage operation v stb h 2.5 - vcc v no-operation v stb l -0.3 - 0.3 v stb pin pull-down resistance r stb 250 400 700 k ? [circuit current] standby current vcc pin i stb - - 1 a circuit current at operation vcc icc1 - 650 1000 a v inv =1.2v circuit current at operation boot1,2 icc2 - 120 240 a v inv =1.2v
technical note 3/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. reference data 0.950 0.975 1.000 1.025 1.050 -40 0 40 80 120 ambient temperature[ ] vref voltage [v] fig.1 standard voltage - power supply property 400 500 600 700 800 0 5 10 15 vcc voltage [v] vref voltage [v] 4.700 4.800 4.900 5.000 5.100 5.200 5.300 -40 0 40 80 120 ambient temperature[ ] vref voltage [v] fig.2 standard voltage - temperature property fig.3 vreg voltage - power supply property fig.6 oscillation frequency - temperature property 0.950 0.975 1.000 1.025 1.050 0 5 10 15 vcc voltage [v] vref voltage [v] 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0 5 10 15 vcc voltage [v] vreg voltage [v] fig.5 oscillation frequency ? power supply property 500 520 540 560 580 600 620 640 660 680 700 -40 0 40 80 120 ambient temperature[ ] vref voltage [v] fig.4 vreg voltage ? temperature property fig.7 icc - power supply property fig.8 icc - temperature property 0 100 200 300 400 500 600 700 800 900 1000 0 5 10 15 vcc voltage [v] vcc current [ua] 500 550 600 650 700 750 800 -40 0 40 80 120 vcc voltage [v] vcc current [ua] 0 20 40 60 80 100 120 140 160 0123456 boot pin voltage [v] boot pin current [ua] fig.9 iboot - power supply property
technical note 4/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. package heat reduction curve fig.16 efficiency data (vout = 3.3 v) example of application circuit [1] fig.17 efficiency data (vout = 5.0 v) example of application circuit [2] fig.18 efficiency data (vout = 8.4 v) example of application circuit [3] fig.13 starting waveform (example of application circuit [2]) l=10uh, cout = 47 uh, fosc = 750 khz, unloaded fig.14 oscillation waveform vcc = 5.0 v, vout = 5.0 v i load = 1000 ma fig.10 line regulation fig.11 load regulation fig.15 load variation waveform (example of application circuit [2]) vcc = 7.4 v, vout = 5.0 v, i load = 200 ma ?? 1000 ma :40 ma/usec 0 10 20 30 40 50 60 70 80 90 100 0 500 1000 1500 load current [ma] efficiency [%] 0 10 20 30 40 50 60 70 80 90 100 0 1000 2000 3000 load current [ma] efficiency [%] 0 10 20 30 40 50 60 70 80 90 100 0 500 1000 1500 2000 load current [ma] efficiency [%] 500usec/div iload(500ma/div) vout(100mv/div) 500usec/div sw1 oscillation waveform (2.0v/div) sw2 oscillation waveform (2.0v/div) vout(2.0v/div) stb(5.0v/div) input current (200ma/div) 0 100 200 300 400 500 600 700 0 25 50 75 100 125 150 ambient temperature[ ] power dissipation [mw] fig.19 heat reduction curve (ic alone) when used at ta = 25c or more, it is reduced by 4.96 mw/c. fig.12 max duty / min duty temperature property 4.950 4.975 5.000 5.025 5.050 0 500 1000 1500 load current [ma] vout voltage [v] 4.950 4.975 5.000 5.025 5.050 0 5 10 15 vcc voltage [v] vout voltage [v] 0 10 20 30 40 50 60 70 80 90 100 0 500 1000 1500 load current [ma] efficiency [%]
technical note 5/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. description of pins block diagram pin no. pin name function 1 rt oscillation frequency set terminal 2 inv error amp input terminal 3 fb error amp output terminal 4 gnd ground terminal 5 stb on/off terminal 6 boot2 output side high-side driver input terminal 7 hg2 output side high-side fet gate drive terminal 8 sw2 output side coil connecting terminal 9 lg2 output side low-side fet gate drive terminal 10 pgnd driver part ground terminal 11 lg1 input side low-side fet gate drive terminal 12 sw1 input side coil connecting terminal 13 hg1 input side high-side fet gate drive terminal 14 boot1 input side high-side driver input terminal 15 vreg 5 v internal regulator output terminal 16 vcc power input terminal fig. 21 block diagram fig. 20 pin layout uvlo vreg vref pre driver pre driver pre driver pre driver on/off logic timming control vreg pwm control timming control + - - osc soft start scp error amp osc x 2400 count vref 1.0v osc x 8200 count fb=h vreg stb boot2 hg2 sw2 lg2 pgnd lg1 sw1 hg1 boot1 vreg vcc rt inv fb gnd on/off vout vbat rt inv fb gnd sw1 lg1 lg2 pgnd vcc vreg boot1 hg1 stb boot2 hg2 sw2
technical note 6/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. description of blocks 1. vref this block generates error amp reference voltage. the reference voltage is 1.0 v. 2. vreg 5.0 v output voltage regulator. used as power supply for ic internal circuit and boot pin supply. follows power supply voltage when it is 5.0 v or below and also drops output voltage. for external oscillation preventive capacitor, 1.0 uf is recommended. 3. uvlo circuit for preventing low voltage malfunction prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage. monitors vreg pin voltage to turn off dc/dc converter output by changing output voltage of hg1, 2 and lg1, 2 pin to l-logic when vreg voltage is 2.4 v or below, and reset the timer latc h of the internal scp circuit and soft-start circuit. 4. scp timer latch system short-circuit protection circuit when the inv pin is the set 1.0 v or lower volt age, the internal scp circuit starts counting. the internal counter is in synch with osc; the latch circuit activates after the counter counts about 8200 oscillations to turn off dc/dc converter output (about 13.6 msec when rt = 51 k ? ). to reset the latch circuit, turn off the stb pin once. then, turn it on again or turn on the power supply voltage again. 5. osc oscillation circuit to change frequency by external resistance of the rt pin (1 pin). when rt = 51 k ? , operation frequency is set at 600 khz. 6. error amp error amplifier for detecting output signals and output pwm control signals the internal reference voltage is set at 1.0 v. 7. pwm comp voltage-pulse width converter for controlling output voltage corresponding to input voltage comparing the internal slope waveform with the error am p output voltage, pwm comp controls the pulse width and outputs to the driver. also controls max duty and min duty. max duty and min duty are set at the primary side and the seco ndary side of the inductor respectively, which are as follows: primary side (sw1) hg1 max duty : about 90 %, hg1 min duty : 0 % secondary side (sw 2) lg2 max duty : about 90 %, lg2 min duty : about 10 %, 8. soft start circuit for preventing in-rush current at startup by bringing the output voltage of the dc/dc converter into a soft-start soft-start time is in synch with the internal osc, and the ou tput voltage of the dc/dc conver ter reaches the set voltage after about 2400 oscillations (about 4 msec when rt = 51 k ? ). 9. nch driver cmos inverter circuit for driving external nch fet. dead time is provided for preventing feedthrough during switching of hg1 = l lg1 = h, hg2 = l lg2 = h and lg1 = l hg1 = h, lg2 = l hg2 = h. the dead time is set at about 100 nsec in the internal circuit. 10. on/off logic voltage applied on stb pin (5 pin) to control on/off of ic. tu rned on when a voltage of 2.5 v or higher is applied and turned off when the terminal is open or 0 v is applied. incorporates approximately 400 k ? pull-down resistance.
technical note 7/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. example of application circuit * example of application circuit: vcc = 2.7 ? 5. 5v, vout = 3.3v, iout = 100 ma ? 2000 ma * example of application circuit: vcc=2.7 ? 14 v, vout 5.0 v, iout 100 ma ? 1500 ma 1 f rb521cs-30 rb521cs-30 0.1 f 4.7 h rtq045n03 vcc = 2.7 v ? 14 v 47 f 0.1 f on/off 30k 5.1k 120k 51k 4.7k 4700p 120p rtq045n03 rtq045n03 rtq045n03 47 f 0.1 f insert a filter as required. vout (set at 5.0 v) fig. 23 example of application circuit (2) rt sw1 vcc inv fb gnd vreg boot1 hg1 lg1 pgnd lg2 stb boot2 hg2 sw2 fig. 22 example of application circuit (1) 1 f rb521cs-30 rb521cs-30 0.1 f 4.7 h rtq045n03 vout (set at 3.3 v) 47 f 0.1 f on/off 43k 7.5k 100k 51k 6.2k 10000p 150p rtq045n03 rtq045n03 rtq045n03 22 f insert a filter as required. 0.1 f rt sw1 vcc inv fb gnd vreg boot1 hg1 lg1 pgnd lg2 stb boot2 hg2 sw2 vcc = 2.7 v ? 5.5 v (tdk slf10165) (tdk slf10165)
technical note 8/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. * example of application circuit: vcc=4.0 ? 14 v, vout 8.4 v, iout 100 ma ? 1500 ma * example of application circuit:vcc=2.7 ? 14 v, vout 12 v, iout 100 ma ? 1500 ma 1 f rb521cs-30 rb521cs-30 0.1 f 4.7 h rss065n03 vout (set at 8.4 v) 47 f2 0.1 f on/off 27k 7.5k 200k 100k 3.9k 4700p 100p rss065n03 rss065n03 rss065n03 vcc = 4.0v ? 14v 47 f insert a filter as required. 0.1 f fig. 24 example of application circuit (3) rt sw1 vcc inv fb gnd vreg boot1 hg1 lg1 pgnd lg2 stb boot2 hg2 sw2 1 f rb521cs-30 rb521cs-30 0.1 f 10 h rss065n03 vout12v 47 f 0.1 f on/off 30k 5.1k 330k 27k 15k 1500p 180p rss065n03 rss065n03 rss065n03 vcc = 2.7 v ? 14 v 10 f insert a filter as required. 0.1 f fig. 25 example of application circuit (4) rt sw1 vcc inv fb gnd vreg boot1 hg1 lg1 pgnd lg2 stb boot2 hg2 sw2 (tdk slf10165) (tdk slf10165)
technical note 9/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. selection of parts for applications (1) output inductor a shielded inductor that satisfies the curr ent rating (current value, ipeak as shown in the drawing below) and has a low dcr (direct current resistance component) is recommended. inductor values affect out put ripple current greatly. ripple current can be reduced as the coil l value becomes larger and the switching frequency becomes higher as the equations shown below. ipeak =iout (vout/vin) / ? il/2 [a] (1) ( : efficiency, ? il: output ripple current, f: switching frequency) as a guide, output ripple current should be set at about 20 to 50% of the maximum output current. * current over the coil rating flowing in t he coil brings the coil into magnetic saturation, which may lead to lower efficiency or output oscillation. select an inductor with an adequate margin so that the peak current does not exceed the rated current of the coil. (2) output capacitor a ceramic capacitor with low esr is recommend ed for output in order to reduce output ripple. there must be an adequate margin between the maximum rating a nd output voltage of the capacitor, taking the dc bias property into consideration. output ripple voltage when ceramic capacitor is used is obtained by the following equation. setting must be performed so that output ripple is within the allowable ripple voltage. (3) external fet an external fet which satisfies the following items and has small ciss (input capacitance), qg (total gate charge quantity) and on resistance should be selected. there must be an adequate marg in between the turn off time of mos and the dead time to prevent through-current. drain-source voltage rating: (output voltage + bodydiode vf of mos or higher) gate-source voltage rating: 7.0 v or higher drain-source current rating: ipeak of output inductor paragraph or higher vpp = ? il + ? il r esr [v] ? (5) 2 fco 1 S il= [a] (in step-down mode) (2) l (vin-vout) vin vout f 1 S il= [a] ((in step-up/down mode) (3) l |(vin-vout)| f 1 S il= [a] (in step-up mode) (4) (vin+vout) vout 2 0.8 l (vout-vin) vout vin f 1 fig. 26ripple current i l vpp= S il S il r esr [v] ??? (5) 2 f co 1
technical note 10/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. (5) boot-sw capacitor the capacitor between boot and sw should be designed so that the gate drive voltage will not be below vgs necessary for the fet to use, taking circuit current input to the boot pin in to consideration. there must be an adequate margin between the maximum rating and gate drive voltage. gate drive voltage = (vreg voltage) ? (vf of di) ? (voltage drop by boot pin consumption) [v] (6) voltage drop by boot pin consumption (iboot (1 / fosc) + qg of external fet) / cboot [v] (7) (6) reg-boot diode a schottky diode which satisfies the following items and has less forward pressure drop (vf) should be selected. average rectified current: there must be an adequate margin against the current consumed by mosfet switching. dc inverse voltage: input voltage or higher (3) setting of oscillation frequency oscillation frequency can be set using a resistance value connected to the rt pin (1 pin). oscillation frequency is set at 600 khz when rt = 51 k ? , and frequency is inversely proportional to rt value. see fig. 27 for the relationship between rt and frequency. soft-start time changes along with oscillation frequency. see fig. 28 for the relationship between rt and soft-start time. * note that the above example of frequency se tting is just a design target value, and may differ from the actual equipment. (4) output voltage setting the internal reference voltage of the erro r amp is 1.0 v. output voltage should be obtained by referring to equation (8) of fig. 29. vref 1.0v vout error amp r1 r2 inv vo= 1.0 [v] ? (8) r2 (r1+r2) 10 100 1000 10000 10 100 1000 rt pin resistance [k ] switchng frequency [khz] 1 10 100 10 100 1000 rt pin resistance [k ] soft start time [msec] fig. 29 setting of feedback resistance fig. 27 oscillation frequency ? rt pin resistance fig. 28 soft-start time ? rt pin resistance
technical note 11/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. (9) determination of external phase compensation condition for stable application the condition for feedback system stabilit y under negative feedback is as follows: - phase delay is 135 or less when gain is 1 (0 db) (phase margin is 45 or higher) since dc/dc converter application is sampled according to t he switching frequency, the gbw of the whole system (frequency at which gain is 0 db) must be set to be equal to or lower than 1/5 of the switching frequency. in summary, target property of applications is as follows: - phase delay must be 135or lower when gain is 1 (0 db) (phase margin is 45 or higher). - the gbw at that time (frequency when gain is 0 db) must be equal to or lower than 1/5 of the switching frequency. for this reason, switching frequency must be increased to improve responsiveness. one of the points to secure stability by phase compensation is to cancel secondary phase delay (-180) generated by lc resonance by the secondary phase lead (i.e. put two phase leads). since gbw is determined by the phase compensation capacitor atta ched to the error amplifier, when it is necessary to reduce gbw, the capacitor should be made larger. phase compensation when output capacitor with low esr such as ceramic capacitor is used is as follows: when output capacitor with low esr (several tens of m ? ) is used for output, secondary phase lead (two phase leads) must be put to cancel secondary phase lead caused by lc. one of the examples of phase co mpensation methods is as follows: for setting of phase-lead frequency, both of t hem should be put near lc resonance frequency. when gbw frequency becomes too hjgh due to the secondary ph ase lead, it may get stabilized by putting the primary phase delay in a frequency slightly higher than the lc resonance frequency to compensate it. -180 0 -90 (a) phase margin gain [db] phase [degree] -20db/decade a 0 error amp is a low-pass filter because phase compensation such as (1) and (2) is performed. for dc /dc converter application, r is a parallel feedback resistance. fig.31 frequency property of integrator fig.30 general integrator fb r c point (a) fp= [hz] (9) 2 r1c1 1 phase lead fz2 = [hz] (12) phase delay fp1 = [hz] (13) 2 r4c2 1 2 r3c1 1 lc resonance frequency = [hz] (14) 2 (lc) 1 fb vout c2 r1 r2 r3 r4 c1 (b) point (b) f gbw = [hz] (10) phase lead fz1= [hz] (11) 2 rca 1 2 rc 1 fig.32 example of setting of phase compensation
technical note 12/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. example of board layout fig.33 example of board layout
technical note 13/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. i/o equivalence circuit vreg vreg gnd inv vreg vreg gnd fb vcc vcc gnd stb boot1,2 sw1,2 hg1,2 pgnd vreg pgnd lg1,2 vcc gnd vreg vreg vreg rt gnd rt inv fb stb boot1,2 hg1,2 sw1,2 lg1,2 pgnd vcc vreg gnd fig.34 i/o equivalence circuit
technical note 14/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. precautions for use 1) absolute maximum rating we dedicate much attention to the quality control of these products, however the po ssibility of deterioration or destruction ex ists if the impressed voltage, operati ng temperature range, etc., exceed the absolute maximum ratings. in addition, it is impossible to predict all destructive situations such as short-circuit mode s, open circuit modes, etc. if a s pecial mode exceeding the absolu te maximum rating is expected, please review matters and provide physical safety means such as fuses, etc. 2) gnd potential keep the potential of the gnd pin below the minimum potential at all times. 3) thermal design work out the thermal design with sufficient margin taking power dissipation (pd) in the actual operation condition into account . 4) short circuit between pins and incorrect mounting attention to ic direction or displacement is required when installing the ic on a pcb. if the ic is installed in the wrong way, it may break. also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the output a nd gnd of the power supply. 5) operation under strong electromagnetic field be careful of possible malfunctions under strong electromagnetic fields. 6) common impedance when providing a power supply and gnd wirings, show suffic ient consideration for lowering common impedance and reducing ripple (i.e., using thick short wiring, cutting ripp le down by lc, etc.) as much as you can. 7) thermal protection circuit (tsd circuit) this ic contains a thermal protection circuit (tsd circuit). t he tsd circuit serves to shut off the ic from thermal runaway and does not aim to protect or assure oper ation of the ic itself. ther efore, do not use the tsd ci rcuit for continuous use or operation after the circuit has tripped. 8) rush current at the time of power activation be careful of the power supply coupling capacity and the width of the power supply and gnd pattern wiring and routing since rush current flows instantaneously at the time of power activation in the case of cmos ic or ic s with multiple power supplies. 9 ) ic terminal input this is a monolithic ic and has p+ isolation and a p substrat e for element isolation between each element. p-n junctions are formed and various parasitic elements are configured using t hese p layers and n layers of the individual elements. for example, if a resistor and transistor are connected to a terminal as shown on fig.-8: the p-n junction operates as a parasitic diode when gnd > (terminal a) in the case of a resist or or when gnd > (pin b) in the case of a transistor (npn) also, a parasitic npn transistor operates using the n layer of an other element adjacent to the previous diode in the case of a transistor (npn) when gnd > (pin b). the parasitic element consequently rises under the potential relati onship because of the ic?s structure. the parasitic element pulls interference that could c ause malfunctions or destruction out of the circui t. therefore, use cauti on to avoid the operati on of parasitic elements caused by applying voltage to an input terminal lower than the gnd (p board), etc. (pin a) gnd p substrate n p n p p (pin a) parasitic element resistor transistor ( npn ) gnd n p n p p (pin b) b n e c gnd n p substrate parasitic element parasitic element fig.35 example of simple structure of bipolar ic
technical note 15/15 BD8303MUV www.rohm.com 2009.03 - rev.a c 2009 rohm co., ltd. all rights reserved. ? ordering part number b d 8 3 0 3 m u v - e 2 part no. part no. package muv: vqfn016v3030 packaging and forming specification e2: embossed tape and reel (the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand) direction of feed vqfn016v3030 ( unit:mm ) 3.0 0.1 1pin mark 3.0 0.1 14 5 8 9 13 16 12 0.5 1.4 0.1 1.4 0.1 0.25 ? 0.04 + 0.05 0.4 0.1 c0.2 0.75 s 0.02 + 0.03 ? 0.02 (0.22) 0.08 1.0max s tape quantity direction of feed embossed carrier tape 3000pcs e2 when you order , please order in times the amount of package quantity. reel 1pin 1234 1234 1234 1234 1234 1234
r0039 a www.rohm.com ? 2009 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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